To my main problem, it is that I have connected all the cables to the Zybo Board that is required USB cable from my laptop to the FPGA and VGA cable from the FPGA up to my monitor screen. On SDK i programmed the FPGA and then ran the project as Launch as Hardware (System debugger and GDB).Īnd the output I am getting through the console is: I generated the bitstream, and then exported the hardware included the bitstream, lastly I launch SDK. The mysterious thing is that I actually made it to work when I was at school, but due to the current situation, we are not able to get much help, I am now alone with it at home.įirstly I'd like to ask what does the console below tell me? I searched on the internet, and found a project with VGA IO. You will use ChipScope to monitor signals at the kernel interface level and perform software debugging using Vitis.
This lab is a continuation of the previous RTL Kernel Wizard Lab lab.
So at the moment we just need to look and see how Vivado and SDK work using Zybo Zynq-7000 Board. Hardware/Software Debugging Introduction.
